I/O instructions (privileged)

This page is barely started. Implementation of these instructions started 31 October 2024. Stay tuned for details as to how they work.

IOCNTR I/O set SPI pulse counter

IOCNTR gets its pulse count from bits 0–7 of n_pulses.

IODEVM I/O set SPI device and mode

IODEVM gets its SPI device and mode from bits 25–18 of dev_mode. The allocation of these bits is to be determined.

IODIVR I/O set SPI clock divisor

IODIVR gets its clock divisor from bits 8–15 of divisor.

IOLAST I/O get last input bits

IOLAST will return up to 36 bits depending on the pulse counter setting. Bit placement specifics are to be determined.

IOXFER I/O transfer bits

IOXFER will move up to 36 bits depending on the pulse counter setting. Bit placement specifics are to be determined. Because SPI transfers one bit at a time, this instruction only begins a transfer that the pulse counter must complete. This means that in_bits will contain the bits shifted in during the previous IOXFER instruction. Bits shifted in when out_bits are sent can be read on either the next IOXFER (if there is more to transmit) or IOLAST (if nothing remains to transmit).